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5.2
8-bit or 14-bit Data
The measured acceleration data is stored in the OUT_X_MSB, OUT_X_LSB, OUT_Y_MSB, OUT_Y_LSB, OUT_Z_MSB, and
OUT_Z_LSB registers as 2’s complement 14-bit numbers. The most significant 8-bits of each axis are stored in OUT_X (Y,
Z)_MSB, so applications needing only 8-bit results can use these 3 registers and ignore OUT_X,Y, Z_LSB. To do this, the
F_READ bit in CTRL_REG1 must be set. When the F_READ bit is cleared, the fast read mode is disabled.
When the full-scale is set to 2g, the measurement range is -2g to +1.99975g, and each count corresponds to 1g/4096
(0.25 mg) at 14-bits resolution. When the full-scale is set to 8g, the measurement range is -8g to +7.999g, and each count
corresponds to 1g/1024 (0.98 mg) at 14-bits resolution. The resolution is reduced by a factor of 64 if only the 8-bit results are
used. For more information on the data manipulation between data formats and modes, refer to Freescale application.
5.3
Internal FIFO Data Buffer
MMA8451Q contains a 32 sample internal FIFO data buffer minimizing traffic across the I 2 C bus. The FIFO can also provide
power savings of the system by allowing the host processor/MCU to go into a SLEEP mode while the accelerometer independently
stores the data, up to 32 samples per axis. The FIFO can run at all output data rates. There is the option of accessing the full
14-bit data or for accessing only the 8-bit data. When access speed is more important than high resolution the 8-bit data read is a
better option.
The FIFO contains four modes (Fill Buffer Mode, Circular Buffer Mode, Trigger Mode, and Disabled Mode) described in the
F_SETUP Register 0x09. Fill Buffer Mode collects the first 32 samples and asserts the overflow flag when the buffer is full and
another sample arrives. It does not collect any more data until the buffer is read. This benefits data logging applications where all
samples must be collected. The Circular Buffer Mode allows the buffer to be filled and then new data replaces the oldest sample in
the buffer. The most recent 32 samples will be stored in the buffer. This benefits situations where the processor is waiting for an
specific interrupt to signal that the data must be flushed to analyze the event. The trigger mode will hold the last data up to the
point when the trigger occurs and can be set to keep a selectable number of samples after the event occurs.
The MMA8451Q FIFO Buffer has a configurable watermark, allowing the processor to be triggered after a configurable number
of samples has filled in the buffer (1 to 32).
For details on the configurations for the FIFO buffer as well as more specific examples and application benefits, refer to
Freescale application note, AN4073 .
5.4
Low Power Modes vs. High Resolution Modes
The MMA8451Q can be optimized for lower power modes or for higher resolution of the output data. High resolution is
achieved by setting the LNOISE bit in Register 0x2A. This improves the resolution but be aware that the dynamic range is limited
to 4g when this bit is set. This will affect all internal functions and reduce noise. Another method for improving the resolution of
the data is by oversampling. One of the oversampling schemes of the data can activated when MODS = 10 in Register 0x2B
which will improve the resolution of the output data only. The highest resolution is achieved at 1.56 Hz.
There is a trade-off between low power and high resolution. Low Power can be achieved when the oversampling rate is
reduced. The lowest power is achieved when MODS = 11 or when the sample rate is set to 1.56 Hz. For more information on
how to configure the MMA8451Q in Low Power mode or High Resolution mode and to realize the benefits, refer to Freescale
application note, AN4075.
5.5
Auto-WAKE/SLEEP Mode
The MMA8451Q can be configured to transition between sample rates (with their respective current consumption) based on
four of the interrupt functions of the device. The advantage of using the Auto-WAKE/SLEEP is that the system can automatically
transition to a higher sample rate (higher current consumption) when needed but spends the majority of the time in the SLEEP
mode (lower current) when the device does not require higher sampling rates. Auto-WAKE refers to the device being triggered by
one of the interrupt functions to transition to a higher sample rate. This may also interrupt the processor to transition from a SLEEP
mode to a higher power mode.
SLEEP mode occurs after the accelerometer has not detected an interrupt for longer than the user definable time-out period.
The device will transition to the specified lower sample rate. It may also alert the processor to go into a lower power mode to save
on current during this period of inactivity.
The Interrupts that can WAKE the device from SLEEP are the following: Tap Detection, Orientation Detection, Motion/Freefall,
and Transient Detection. The FIFO can be configured to hold the data in the buffer until it is flushed if the FIFO Gate bit is set in
Register 0x2C but the FIFO cannot WAKE the device from SLEEP.
The interrupts that can keep the device from falling asleep are the same interrupts that can wake the device with the addition
of the FIFO. If the FIFO interrupt is enabled and data is being accessed continually servicing the interrupt then the device will
remain in the WAKE mode. Refer to AN4074, for more detailed information for configuring the Auto-WAKE/SLEEP.
MMA8451Q
Sensors
Freescale Semiconductor, Inc.
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